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台積電-臺灣大學聯合研發中心

近五年重要論文(摘錄)

序號論文名稱姓名發表刊物/研討會名稱卷期
1Innovative Nb Electrode Engineering for Ultra-Low-Voltage (Vop = 0.8 V) Ferroelectric Memory with Record-High Energy Efficiency: Applications in Selector-Free FeRAM and Neuromorphic ComputingC.-H. Wu, C.-H. Chang, Y.-M. Tseng, T.-Y. Lin, K.-H. Kao, C.-J. Su, and V. P.-H. Hu (胡璧合)2025 Symposium on VLSI Technology and Circuits (VLSI)
2Performance Step-Up in PMOS with Monolayer WSe2 ChannelAng-Sheng Chou, Yu-Tung Lin, Ming-Yang Li, Po-Sen Mao, Ching-Hao Hsu, Sui-An Chou, Yu-Wei Hsu, Shuer Ku, Goutham Arutchelvan, Wei-Sheng Yun, Chen-Feng Hsu, Wen-Chia Wu, Terry Y. T. Hung, Meng-Zhan Li, Dawei Heh, Po-Hsun Ho, Ying-Zhan Chiu, Georgios Vellianitis, Mark van Da, Wen-Hao Chang, Chih-I Wu (吳志毅), Chao-Ching Cheng, Iuliana Radu, Min Cao2025 Symposium on VLSI Technology and Circuits (VLSI)
3Low-Power CMOS Inverter with Enhancement-mode Operation and Matched VTH at VDD = 1 V on Monolayer 2D Material ChannelAng-Sheng Chou, Ching-Hao Hsu, Yu-Tung Lin, Fa-Rong Hou, Edward Chen, Po-Sen Mao, Ming-Yang Li, Sui-An Chou, Dawei Heh, Hsiang-Chi Hu, Yu-Sung Chang, Wen-Chia Wu, Zih-Syuan Huang, Yu-Wei Hsu, Yuan-Chun Su, Terry Y.T. Hung, Po-Hsun Ho, Tsung-En Lee, Chen-Feng Hsu, Goutham Arutchelvan, Yun-Yan Chung, Chao-Hsin Chien, Georgios Vellianitis, Wei-Yen Woon, Jin Cai, Mark van Dal, Wen-Hao Chang, Chih-I Wu (吳志毅), Chao-Ching Cheng, and Iuliana P. Radu2024 International Electron Device Meeting (IEDM)
4Conflict-Free and Area-Efficient 4N4P CFET 8T SRAM with Double-Sided Signal Routing for Multibit Compute-in-Memory in AI Edge DevicesY.-C. Lu, M.-L. Wu, and V. P.-H. Hu (胡璧合)2024 International Electron Device Meeting (IEDM)
5Energy Material for Extreme Environment: Unveiling Novel Self-Resilience of Hf1-xZrxO2 for Electrostatic Energy Storage (EES) and Pyroelectric Energy Harvesting (PEH)C.-H. Liu, K.-Y. Hsiang, F.-S. Chang, Y.-T. Chang, C. W. Liu, and M. H. Lee (李敏鴻)2024 International Electron Device Meeting (IEDM)
63D Stackable Vertical Ferroelectric Tunneling Junction (V-FTJ) with on/off Ratio 1500x, Applicable Cell Current, Self-Rectifying Ratio 1000x, Robust Endurance of 109 Cycles, Multilevel and Demonstrated Macro Operation Toward High-Density BEOL NVMsJ.-Y. Lee, F.-S. Chang, K.-Y. Hsiang, P.-H. Chen, Z.-F. Luo, Z.-X. Li, J.-H. Tsai, C. W. Liu (劉致為), and M. H. Lee(李敏鴻)2023 Symposium on VLSI Technology and Circuits (VLSI)
7FeRAM Recovery up to 200 Periods with Accumulated Endurance 1012 Cycles and an Applicable Array Circuit toward Unlimited eNVM OperationsK.-Y. Hsiang, J.-Y. Lee, F.-S. Chang, Z.-F. Lou, Z.-X. Li, Z.-H. Li, J.-H. Chen, C. W. Liu, T.-H. Hou, and M. H. Lee (李敏鴻)2023 Symposium on VLSI Technology and Circuits (VLSI)
8Extremely High-k Hf0.2Zr0.8O2 Gate Stacks Integrated into Ge0.95Si0.05 Nanowire and Nanosheet nFETs Featuring Respective Record ION per Footprint of 9200μA/μm and Record ION per Stack of 360μA at VOV=VDS=0.5VYi-Chun Liu, Yu-Rui Chen, Yun-Wen Chen, Hsin-Cheng Lin, Wan-Hsuan Hsieh, Chien-Te Tu, Bo-Wei Huang, Wei-Jen Chen, Chun-Yi Cheng, Shee-Jier Chueh, and C. W. Liu (劉致為)2023 Symposium on VLSI Technology and Circuits (VLSI)
9First Stacked Nanosheet FeFET Featuring Memory Window of 1.8V at Record Low Write Voltage of 2V and Endurance >1E11 CyclesYu-Rui Chen, Yi-Chun Liu, Zefu Zhao, Wan-Hsuan Hsieh, Jia-Yang Lee, Chien-Te Tu, Bo-Wei Huang, Jer-Fu Wang, Shee-Jier Chueh, Yifan Xing, Guan-Hua Chen, Hung-Chun Chou, Dong Soo Woo, M. H. Lee, and C. W. Liu (劉致為)2023 Symposium on VLSI Technology and Circuits (VLSI)
10Towards Epitaxial Ferroelectric HZO on n+-Si/Ge Substrates Achieving Record 2Pr = 84 μC/cm2 and Endurance > 1E11Zefu Zhao, Yu-Rui Chen, Yun-Wen Chen, Wan-Hsuan Hsieh, Jer-Fu Wang, Jia-Yang Lee, Yifan Xing, Guan-Hua Chen, and C. W. Liu (劉致為)2023 Symposium on VLSI Technology and Circuits (VLSI)
11First Demonstration of a-IGZO GAA Nanosheet FETs Featuring Achievable SS=61 mV/dec, Ioff<10-7mA/mm, DIBL=44 mV/V, Positive VT, and Process Temp. of 300 oCJih-Chao Chiu, Eknath Sarkar, Yuan-Ming Liu, Yu-Ciao Chen, Yu-Cheng Fan, and C. W. Liu (劉致為)2023 Symposium on VLSI Technology and Circuits (VLSI)
12Energy- and Area-Efficient 8T SRAM Cell with FEOL CFETs and BEOL-Compatible TransistorsM. Lee, Z.-Y. Huang, S.-F. Fang, Y.-C. Lu, and V. P.-H. Hu (胡璧合)2022 IEEE International Electron Devices Meeting (IEDM)
13First Demonstration of Monolithic 3D Self-aligned GeSi Channel and Common Gate Complementary FETs by CVD Epitaxy Using Multiple P/N Junction IsolationChien-Te Tu, Yi-Chun Liu, Bo-Wei Huang, Yu-Rui Chen, Wan-Hsuan Hsieh, Chung-En Tsai, Shee-Jier Chueh, Chun-Yi Cheng, Yichen Ma, and C. W. Liu (劉致為)2022 IEEE International Electron Devices Meeting (IEDM)
14Novel Opposite Polarity Cycling Recovery (OPCR) of HfZrO2 Antiferroelectric-RAM with an Access Scheme Toward Unlimited EnduranceK.-Y. Hsiang, Y.-C. Chen, F.-S. Chang, C.-Y. Lin, C.-Y. Liao, Z.-F. Lou, J.-Y. Lee, W.-C. Ray, Z.-X. Li, C.-C. Wang, H.-C. Tseng, P.-H. Chen, J.-H. Tsai, M. H. Liao, T.-H. Hou, C. W. Liu (劉致為), P.-T. Huang, P. Su, and M. H. Lee (李敏鴻)2022 IEEE International Electron Devices Meeting (IEDM)
15Superlattice HfO2-ZrO2 based Ferro-Stack HfZrO2 FeFETs: Homogeneous-Domain Merits Ultra-Low Error, Low Programming Voltage 4 V and Robust Endurance 109 cycles for Multibit NVMC.-Y. Liao, Z.-F. Lou, C.-Y. Lin, A. Senapati, R. Karmakar, K.-Y. Hsiang, Z.-X. Li, W.-C. Ray, J.-Y. Lee, P.-H. Chen, F.-S. Chang, H.-H. Tseng, C.-C. Wang, J.-H. Tsai, Y.-T. Tang, S. T. Chang (張書通), C. W. Liu (劉致為), S. Maikap (麥凱), and M. H. Lee (李敏鴻)2022 IEEE International Electron Devices Meeting (IEDM)
16Interfacial-Layer Design for Hf1-xZrxO2-Based FTJ Devices: From Atom to ArrayH.-L. Chiang, J.-F. Wang, K.-H. Lin, C.-H. Nien, J.-J. Wu, K.-Y. Hsiang, C.-P. Chuu, Y.-W. Chen, X.W. Zhang, C. W. Liu (劉致為), Tahui Wang, C.-C. Wang, M.-H. Lee (李敏鴻), M.-F. Chang, C.-S. Chang, and T.C. Chen2022 Symposia on VLSI Technology and Circuits (VLSI)
17Nearly Ideal Subthreshold Swing and Delay Reduction of Stacked Nanosheets Using Ultrathin BodiesChung-En Tsai, Chun-Yi Cheng, Bo-Wei Huang, Hsin-Cheng Lin, Tao Chou, Chien-Te Tu, Yi-Chun Liu, Sun-Rong Jan, Yu-Rui Chen, Wan-Hsuan Hsieh, Kung-Ying Chiu, Shee-Jier Chueh, and C. W. Liu (劉致為)2022 Symposia on VLSI Technology and Circuits (VLSI)
18Endurance > 1011 Cycling of 3D GAA Nanosheet Ferroelectric FET with Stacked HfZrO2 to Homogenize Corner Field Toward Mitigate Dead Zone for High-Density eNVMC.-Y. Liao, K.-Y. Hsiang, Z.-F. Lou, H.-C. Tseng, C.-Y. Lin, Z.-X. Li, F.-C. Hsieh, C.-C. Wang, F.-S. Chang, W.-C. Ray, Y.-Y. Tseng, S. T. Chang, T.-C. Chen, and M. H. Lee (李敏鴻)2022 Symposia on VLSI Technology and Circuits (VLSI)
19High-Density and High-Speed 4T FinFET SRAM for Cryogenic ComputingV. P.-H. Hu (胡璧合), Chang-Ju Liu, Hung-Li Chiang, Jer-Fu Wang, Chao-Ching Cheng, Tzu-Chiang Chen, and Meng-Fan Chang2021 IEEE International Electron Devices Meeting (IEDM)
20Contact Engineering for High-Performance N-Type 2D Semiconductor TransistorsY. Lin, P.-C. Shen, C. Su, A.-S. Chou, T. Wu, C.-C. Cheng, J.-H. Park, M.-H. Chiu, A.-Y. Lu, H.-L. Tang, M. M. Tavakoli, G. Pitner, X. Ji, C. McGahan, X. Wang, Z. Cai, N. Mao, J. Wang, Y. Wang, W. Tisdale, X. Ling, K. E. Aidala, V. Tung, J. Li1 , A. Zettl, C.-I. Wu(吳志毅), Jing Guo, H. Wang, J. Bokor, T. Palacios, L.-J. Li , J. Kong2021 IEEE International Electron Devices Meeting (IEDM)
21Antimony Semimetal Contact with Enhanced Thermal Stability for High Performance 2DElectronics,A-S Chou, T. Wu, C-C Cheng, S-S Zhan, I-C Ni, S-Y Wang, Y-C Chang, S-L Liew,E.Chen, W-H Chang, C-I Wu (吳志毅), J. Cai, H.-S. Philip Wong and H. Wang2021 IEEE International Electron Devices Meeting (IEDM)
22Highly Stacked 8 Ge0.9Sn0.1 Nanosheet pFETs with Ultrathin Bodies (~3nm) and Thick Bodies (~30nm) Featuring the Respective Record ION/IOFF of 1.4x107 and Record ION of 92μA at VOV=VDS= -0.5V by CVD Epitaxy and Dry EtchingChung-En Tsai, Yi-Chun Liu, Chien-Te Tu, Bo-Wei Huang, Sun-Rong Jan, Yu-Rui Chen, Jyun-Yan Chen, Shee-Jier Chueh, Chun-Yi Cheng, Chia-Jung Tsen, Yichen Ma, and C. W. Liu (劉致為)2021 IEEE International Electron Devices Meeting (IEDM)
23First Highly Stacked Ge0.95Si0.05 nGAAFETs with Record ION = 110 μA (4100 μA/μm) at VOV=VDS=0.5V and High Gm,max = 340 μS (13000 μS/μm) at VDS=0.5V by Wet EtchingYi-Chun Liu, Chien-Te Tu, Chung-En Tsai, Yu-Rui Chen, Jyun-Yan Chen, Sun-Rong Jan, Bo-Wei Huang, Shee-Jier Chueh, Chia-Jung Tsen, and C. W. Liu (劉致為)2021 Symposia on VLSI Technology and Circuits (VLSI)
24First Demonstration of Interface-Enhanced SAF Enabling 400oC-Robust 42 nm p-SOT-MTJ Cells with STT-Assisted Field-Free Switching and Composite ChannelsYa-Jui Tsou, Kai-Shin Li, Jia-Min Shieh, Wei-Jen Chen, Hsiu-Chih Chen, Yi-Ju Chen, Cho-Lun Hsu, Yao-Min Huang, Fu-Kuo Hsueh, Wen-Hsien Huang, Wen-Kuan Yeh, Huan-Chi Shih, Pang-Chun Liu, C. W. Liu (劉致為), Yu-Shen Yen, Chih-Huang Lai, Jeng-Hua Wei, Denny D. Tang, and Jack Yuan-Chen Sun2021 Symposia on VLSI Technology and Circuits (VLSI)
25First Demonstration of Multi-VT Stacked Ge0.87Sn0.13 Nanosheets by Dipole-Controlled ALD WNxCy Work Function Metal with Low Resistivity and Thermal Budget ≤ 400 °CChung-En Tsai, Yu-Rui Chen, Chien-Te Tu, Yi-Chun Liu, Jyun-Yan Chen, and C. W. Liu (劉致為) 2021 Symposia on VLSI Technology and Circuits (VLSI)